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Over the last decades, we have witnessed an exponential increase in sequential computing performance, but since few years this progress is slowing down. This paper describes the current evolutions in technology and architecture that cause this slowdown, and lists the major research challenges that need to be tackled in the coming years to further continue this exponential performance growth. If the computing industry fails to solve these challenges soon, this will for the first time lead to a stop of the exponential performance growth, which might eventually impact the economic growth of western economies.

Already today we face architectures featuring up to several hundreds of processors, being able to manage several thousand concurrent threads. Future architectures, however, will not only see an increase in parallelism but also feature an increase in heterogeneity and reconfigurability. Judging from current production and prototype architectures, we also see that such systems will be tiled, i. e., individual cores with local memory interconnected through some means of on-chip communication. Current discussions show that existing approaches to application mapping, parallelization, data locality optimization, and system management do not match these upcoming architectures well, thus rather hampering than harnessing the power of future systems. We will therefore outline the requirements of upcoming architectures and demonstrate how self-organization, including bio-inspired, techniques may help to manage system complexity. Key to these techniques is a sophisticated decentralized, hierarchical monitoring approach suitable for sustained real-time monitoring and event correlation for current and future high-performance architectures.

In this seminal paper, we introduce the notion of invasive algorithms and corresponding parallel computing architectures also called invasive. The main idea of invasion is to add to a given single-processor program the ability to explore neighbor processors and to copy itself to such processors in a phase of invasion, and then to execute the given problem in parallel based on the available (invasible) region on a given multi-processor architecture. After this parallel execution, the program may perform a retreat and resume execution again sequentially on the single processor. In order to support invasion, new architectural concepts as well as means to support invasion on reconfigurable MPSoCs are provided. We do believe that invasion will become an important step towards self-organizing behavior which will be needed in the massively parallel MPSoC area beyond the year 2020 with unrivaled performance and resource efficiency numbers as one of the main challenges for MPSoCs apart from their programming. In case of invasion, an algorithm is able to spread itself for parallel execution based on availability of processing resources.

Reconfigurable architectures have shown their ability to provide high performance and high efficiency in the past. Unfortunately, almost all existing architectures require the usage of heavy weight tool sets to map an application to the reconfigurable fabric. Thus, these architectures can not be dynamically adapted to the requirements of the running applications. The AMIDAR concept fills this gap and has shown its ability to adapt itself to running applications. In this contribution we elaborate on the automatic integration of application specific functional units into the running application code.

Java is getting more and more important in embedded systems. However, there are several obstacles like the poor real-time capability, the garbage collection, and the need for a sufficient runtime environment. We present the jamuth Java framework which provides a multithreaded Java processor as IP core for programmable logic devices (FPGAs), a runtime system, and the necessary offline tools. The framework provides CDC compatibility and real-time support for embedded systems as well as a powerful garbage collection.

Zusammenfassung Dieser Aufsatz gibt einen Überblick über eine formale Methode zur Analyse mobiler Realzeitsysteme. Beispiele solcher Systeme sind Fahrzeugsteuerungen und mobile Roboter. Es wird eine spatio-temporale Logik entwickelt, mit der sowohl die Systeme modelliert als auch die gewünschten Eigenschaften beschrieben werden können. Für diese Logik werden die theoretischen Grundlagen wie Entscheidbarkeit und Axiomatisierbarkeit untersucht und daraus der Prototyp eines automatischen Verifikationswerkzeuges entwickelt. Die Anwendung wird anhand einer aus der Industrie stammenden Fallstudie demonstriert.

Zusammenfassung Für Speicher aus Ferritkernen, dünnen magnetischen Schichten und supraleitenden Schichten wird der Zusammenhang zwischen erreichbarer Kapazität und Zugriffszeit diskutiert. Beim magnetischen Dünnschichtspeicher wird ein neuartiges Speicherverfahren angegeben, welches die Blockierung in schwerer Richtung zur Erzeugung zweier zusätzlicher stabiler Speicherzustände ausnützt.