Enhanced sensitive phase alpha plane scheme against high resistance ground faults
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und
Abstract
Phase-based Alpha (α) Plane Relaying (APR) scheme has numerous advantages over the Current Differential Relay (CDR) for transmission line protection. Since the large Restraining Region (RR) in the APR makes high security against CT saturation, channel delay, line charging current and synchronization error. However, the APR loses its sensitivity for high resistance ground faults, especially single line to ground faults under outfeed conditions. Also, losing its dependability under close-in low resistance three-phase faults. Thereby, the sequence-based APR provides enhanced sensitivity with the cost of computational burden and complexity. Hence, in this paper, the concept of the average value (I Avg) of both end instantaneous currents is used as an auxiliary logic. In which, the polarity of I Avg is incorporated as an add-on logic to the conventional APR to confirm high resistance internal faults. Thereby, the requirement of sequence components can be avoided (negative and zero). To validate the proposed auxiliary logic, it is tested for the WSCC (Western System Coordinating Council) 9-bus, 110 kV, 50 Hz. System. The simulated results under various fault cases found authenticated results. In addition, the comparative assessment and validation with real-world data reveal the enhanced sensitivity of the proposed logic under high-resistance ground faults.
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Author contributions: All the authors have accepted responsibility for the entire content of this submitted manuscript and approved submission.
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Research funding: None declared.
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Conflict of interest statement: The authors declare no conflicts of interest regarding this article.
Appendix 1
(a) Transmission line (T 7-5) data (Base values are 100 MVA, 110 kV).
| Parameter | Value |
|---|---|
| (+) Sequence resistance R | 0.0032 (pu/m) |
| (+) Sequence X L | 0.0161 (pu/m) |
| (+) Sequence B | 0.306 (pu/m) |
(b) Equivalent source impedance data w.r.t Bus-7 and 5.
| Bus-7 | Bus-5 | |
| Voltage (kV) | 110∠35° | 110∠5° |
| Positive sequence impedance (pu) | 0.02 +j 0.52 | 0.031 +j 0. 65 |
| Zero sequence impedance (pu) | 0.22 +j 5.622 | 0.35 +j 7.2 |
| Rated load at Bus-5 | 100 MW, 25 MVAR per phase | |
| CT ratio = 500:1 A |
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Artikel in diesem Heft
- Frontmatter
- Research Articles
- Harmonic power sharing control using adaptive virtual harmonic impedance in islanded microgrids
- Performance evaluation of seven level grid-tied PV inverter employs seven switches with the triple gain
- Transient thermal analysis of gas insulated switchgear modules using thermal network approach
- Multi-source perceptual blind compensation inspection method for substation based on equipment’s visual blind area identification and saliency detection
- Electric vehicle charging pile capacity planning based on normal distribution Monte Carlo sampling model
- Robust synergetic control of electric vehicle equipped with an improved load torque observer
- Techno-economic analysis of integrating battery energy storage systems in industrial buildings
- Enhanced sensitive phase alpha plane scheme against high resistance ground faults
- Improved adaptive micro-grid over current protection scheme considering false tripping
- Low voltage ride through control strategy for grid-tied solar photovoltaic inverter
- Study on the influence of dual-winding optimization design on the torque and suspension performance of bearingless motor
