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Focus tolerance influenced by source size in Talbot lithography

  • Takashi Sato

    Takashi Sato received his Master of Engineering (1984) and Doctor of Engineering (2007) degrees from Tokyo Institute of Technology. He joined Toshiba in 1984. He has worked on the development of optical lithography in areas such as resolution enhancement techniques, alignment systems, deep UV lithography processing, the influence of mask topography, and lithography monitoring and modeling. He was assigned to IBM East Fishkill for 3 years from 1993 to take part in DRAM development. Recently, he has focused on lithographic simulations for future technology development. His current interests include nano-scale control and the cost effectiveness of lithography processes.

     EMAIL logo     , Akiko Yamada

    Akiko Yamada received her Master of Science (1991) degree from Tokyo Metropolitan University. She joined Toshiba in 1991 and has worked in the lithographic processing field. She has optimized various process parameters, including antireflection and resist processing parameters. She has also been engaged in the development of DUV lithography, with specific contributions to resist development and process window analysis. She is currently working on process window prediction through lithographic simulations.

         and Takeshi Suto

    Takeshi Suto joined Toshiba in 1991. He has worked on the development of lithography processes. He is currently engaged in lithography simulation work.
Published/Copyright: June 16, 2015
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Advanced Optical Technologies
From the journal Advanced Optical Technologies Volume 4 Issue 4

Abstract

Using a simulation, we investigate the effects of the light source size and derive an effective method for suppression of the subfringes that appear in ArF Talbot lithography, which has been proposed for submicron pattern transfer applications. The appearance of the subfringes, which were caused by interference, was related to the size of the light source. If an appropriate light source size is chosen, then, a large process window can be obtained. Guidelines for source size selection are given.

Keywords: interference; light source size; lithography; process window; Talbot effect
Corresponding author: Takashi Sato, Center for Semiconductor Research and Development, Toshiba Corporation 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki, Kanagawa 212-8583, Japan, e-mail:

About the authors

Takashi Sato

Takashi Sato received his Master of Engineering (1984) and Doctor of Engineering (2007) degrees from Tokyo Institute of Technology. He joined Toshiba in 1984. He has worked on the development of optical lithography in areas such as resolution enhancement techniques, alignment systems, deep UV lithography processing, the influence of mask topography, and lithography monitoring and modeling. He was assigned to IBM East Fishkill for 3 years from 1993 to take part in DRAM development. Recently, he has focused on lithographic simulations for future technology development. His current interests include nano-scale control and the cost effectiveness of lithography processes.

Akiko Yamada

Akiko Yamada received her Master of Science (1991) degree from Tokyo Metropolitan University. She joined Toshiba in 1991 and has worked in the lithographic processing field. She has optimized various process parameters, including antireflection and resist processing parameters. She has also been engaged in the development of DUV lithography, with specific contributions to resist development and process window analysis. She is currently working on process window prediction through lithographic simulations.

Takeshi Suto

Takeshi Suto joined Toshiba in 1991. He has worked on the development of lithography processes. He is currently engaged in lithography simulation work.

Acknowledgments

The authors would like to thank Satoshi Tanaka, Ryoichi Inanami, Kazuto Matsuki, and Shinichi Ito for fruitful discussions, and Tatsuhiko Higashiki and Shimon Maeda for providing management support. The authors also thank the Synopsys support team for their kind support of our simulation work.

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Received: 2015-3-14
Accepted: 2015-5-20
Published Online: 2015-6-16
Published in Print: 2015-8-1

©2015 THOSS Media & De Gruyter

Articles in the same Issue

  1. Cover and Frontmatter
  2. Views
  3. ITRS lithography roadmap: 2015 challenges
  4. Community
  5. EOS NEWS: Report from the World of Photonics Congress 2015
  6. Conference Notes
  7. Conference Calendar
  8. Topical Issue: Optical Lithography
  9. Editorial
  10. Introduction to the special issue on optical lithography
  11. Review Articles
  12. How to make lithography patterns print: the role of OPC and pattern layout
  13. Exposure tool control for advanced semiconductor lithography
  14. Performance of 100-W HVM LPP-EUV source
  15. Resist material options for extreme ultraviolet lithography
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  17. Research Articles
  18. Focus tolerance influenced by source size in Talbot lithography
  19. Flat-field anastigmatic mirror objective for high-magnification extreme ultraviolet microscopy
https://doi.org/10.1515/aot-2015-0022
Keywords for this article
interference; light source size; lithography; process window; Talbot effect

Articles in the same Issue

  1. Cover and Frontmatter
  2. Views
  3. ITRS lithography roadmap: 2015 challenges
  4. Community
  5. EOS NEWS: Report from the World of Photonics Congress 2015
  6. Conference Notes
  7. Conference Calendar
  8. Topical Issue: Optical Lithography
  9. Editorial
  10. Introduction to the special issue on optical lithography
  11. Review Articles
  12. How to make lithography patterns print: the role of OPC and pattern layout
  13. Exposure tool control for advanced semiconductor lithography
  14. Performance of 100-W HVM LPP-EUV source
  15. Resist material options for extreme ultraviolet lithography
  16. Development of element technologies for EUVL
  17. Research Articles
  18. Focus tolerance influenced by source size in Talbot lithography
  19. Flat-field anastigmatic mirror objective for high-magnification extreme ultraviolet microscopy
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