Volume 3, Issue 4

Bipartite graphs are widely used for modeling of complex structures in biology, engineering, and computer science. The search for shortest paths in such structures is a highly demanded procedure that requires optimization. This paper presents a variant of the all-pairs shortest path algorithm for bipartite graphs. The method is based on the distance matrix product and improves the general algorithm by exploiting the graph topology. The space complexity is reduced by a factor of at least four and the time complexity decreased by almost an order of magnitude when compared with the basic APSP algorithm.

This paper proposes a de-noising method where the detection and filtering is based on unsupervised classification of pixels. The noisy image is grouped into subsets of pixels with respect to their intensity values and spatial distances. Using a novel fitness function the image pixels are classified using the Particle Swarm Optimization (PSO) technique. The distance function measured similarity/dissimilarity among pixels using not only the intensity values, but also the positions of the pixels. The detection technique enforced PSO based clustering, which is very simple and robust. The filtering operator restored only the noisy pixels keeping noise free pixels intact. Four types of noise models are used to train the digital images and these noisy images are restored using the proposed algorithm. Results demonstrated the effectiveness of the proposed technique. Various benchmark images are used to produce restoration results in terms of PSNR (dB) along with other parametric values. Some visual effects are also presented which conform better restoration of digital images through the proposed technique.

As the technology is growing day by day, information security plays a very important role in our lives. In order to protect the information, several cryptographic algorithms have been proposed. The aim of this paper is to present an effective Advanced Encryption Standard (AES) architecture to achieve high throughput for security applications. The Parallel Sub-Pipelined architecture (PSP) is proposed in order to obtain high throughput. The proposed architecture is also compared with loop unrolled, pipelined, sub-pipelined, parallel and parallel pipelined architecture in terms of throughput. The AES algorithm using Parallel Sub-Pipelined architecture was prototyped in FPGA (Field Programmable Gate Array) and ASIC (Application Specific Integrated Circuit).The proposed architecture yielded a throughput of 59.59 Gbps at a frequency of 450.045 MHz on FPGA Virtex XC6VLX75T which is higher than the throughput yielded in other architectures. In ASIC 0.13 µm technology, the proposed architecture yielded a throughput of 25.60 Gbps and in 0.18 µm, it yielded a throughput of 20.56 Gbps.