Volume 59, Issue 3 - Modern Database Architectures for Modern Hardware / Guest Editor: Wolfgang Lehner

Storage Class Memory (SCM) is emerging as a viable solution to lift DRAM's scalability limits, both in capacity and energy consumption. Indeed, SCM combines the economic characteristics, non-volatility, and density of traditional storage media with the low latency and byte-addressability of DRAM. In this paper we survey research works on how SCM can be leveraged in databases and explore different solutions ranging from using SCM as disk replacement, to single-level storage architectures, where SCM is used as universal memory (i.e., as memory and storage at the same time), together with the challenges that stem from these opportunities. Finally, we synthesize our findings into recommendations on how to exploit the full potential of SCM in next-generation database architectures.

Computing hardware is constantly evolving and database systems need to adapt to ongoing hardware changes to improve performance. The current hardware trend is heterogeneity, where multiple computing units like CPUs and GPUs are used together in one system. In this paper, we summarize our efforts to use hardware heterogeneity efficiently for query processing. We discuss different approaches of execution and investigate heterogeneous placement in detail by showing, how to automatically determine operator placement decisions according to the given hardware environment and query properties.

To escape a number of physical limitations (e.g., bandwidth and thermal issues), hardware technology is strongly trending toward heterogeneous system designs , where a large share of the application work can be off-loaded to accelerators , such as graphics or network processors. In the database domain, field-programmable gate arrays (FPGAs) were recently discovered as a powerful class of co-processors. Data-intensive tasks can benefit from their very high bandwidth paired with a very low latency . However, a number of challenges still have to be solved before FPGA-accelerated systems can go mainstream. Applications must leverage the massive parallelism provided by FPGAs; algorithms must be re-designed with awareness for communication ; and new abstractions are needed to make system development effective. In this article, we report on some of the results we obtained working toward solutions to these challenges. They have been carried out in the context of the Avalanche project, a pioneer in the use of FPGAs for database applications.

In main-memory database systems, the time to process the data has become a limiting factor due to the missing access gap. With changing processing capabilities (e.g., branch prediction, pipelining) in every new CPU architecture, code that was optimal once will probably not stay the best code forever. In this article, we analyze processing capabilities of the classical CPU and describe code optimizations to exploit the capabilities. Furthermore, we present state-of-the-art compiler techniques that already implement code optimizations, while also showing gaps for further code optimization integration.

A lot of different indexes have been developed for accelerating search operations on large data sets. Search trees, representing the most prominent class, are ubiquitous in database management systems but are also widely used in non-DBMS applications. An approach for lowering the implementation complexity of these structures are index frameworks like generalized search trees (GiST). Common data management operations are implemented within the framework which can be specialized by data organization and evaluation strategies in order to model the actual index type. These frameworks are particularly useful in scientific and engineering applications where characteristics of the underlying data set are not known a priori and a lot of prototyping is required in order to find suitable index structures for the workload. However, existing frameworks only abstract data organization and data maintenance aspects to model different index families, while traversal operations for executing searches are implemented serially. This paper presents an approach for enabling parallel processing in GiST in order to leverage the full power of parallel processor architectures for different index implementations at once. Further, results of a prototypical implementation are evaluated on a hybrid CPU/GPU system architecture to verify the applicability of this generic framework idea on different hardware platforms.

DB2 for z/OS is the backbone of many transactional systems in the world. IBM DB2 Analytics Accelerator (IDAA) is IBM's approach to enhance DB2 for z/OS with very fast processing of OLAP and analytical SQL workload. While IDAA was originally designed as an appliance to be connected directly to System z, the trend in the IT industry is towards cloud environments. That offers a broad range of tools for analytical data processing tasks. This article presents the architecture for offering a hybrid IDAA, which continues the seamless integration with DB2 for z/OS and now also runs as a specialty engine in cloud environments. Both approaches have their merit and will remain important for customers in the next years. The specific challenges for accelerating query processing for relational data in the cloud are highlighted. Specialized hardware options are not readily available, and that has a direct impact on the system architecture, the offered functionality and its implementation.