Volume 57, Issue 3 - Special Issue: Dependable Embedded Systems / Jörg Henkel

Achieving system-level dependability is a demanding task. The manifold requirements and dependability threats can no longer be statically addressed at individual abstraction layers. Instead, all components of future multi-processor systems-on-chip (MPSoCs) have to contribute to this common goal in an adaptive manner. In this paper we target a generic heterogeneous MPSoC that combines general purpose processors along with dedicated application-specific hard-wired accelerators, fine-grained reconfigurable processors, and coarse-grained reconfigurable architectures. We present different reactive and proactive measures at the layers of the runtime system (online resource management), system architecture (global communication), micro architecture (individual tiles), and gate netlist (tile-internal circuits) to address dependability threats.

The increasing error susceptibility of semiconductor devices has put reliability in the focus of modern design methodologies. Low-level techniques alone cannot economically tackle this problem. Instead, counter measures on all system layers from device and circuit up to the application are required. As these counter measures are not for free, orchestrating them across different layers to achieve optimum trade-offs for the application wrt. reliability but also cost, timeliness, or energy consumption becomes a challenge. This typically requires a combination of analysis techniques to quantify the achieved reliability and optimization techniques that search for the best combination of counter measures. This work presents five recent approaches for application-aware cross-layer reliability optimization from within the embedded domain. Moreover, the Resilience Articulation Point (RAP) as a concept cooperatively developed to model errors across different layers is discussed. The developed approaches are showcased via applications, ranging from MIMO systems to distributed embedded control applications.

This paper presents a multi-layer software reliability approach that leverages multiple software layers (e. g., programming language, compiler, and operating system) to improve the overall system reliability considering unreliable or partly-reliable hardware. We present a comprehensive design flow that integrates multiple software layers while accounting for the knowledge from lower hardware layers. We show how multiple software layers synergistically operate to achieve a high degree of reliability.

In this paper we summarize recent results and contributions from the NSF Expedition on Variability-Aware Software, a five year, multi-university effort to tackle the problem of hardware variations and its implications and opportunities in software. The Expedition has made contributions in characterization and online monitoring of variations (particularly in microprocessors and flash memories), proposed new coding techniques for variability-tolerant storage, provided tools and platforms for the development of variability-aware software, and created new runtime support systems for variability-aware task-scheduling and execution.

What started as a distant vision just a few decades ago is quickly becoming reality. Autonomous vehicles are about to be deployed on a large scale and will fundamentally change our transportation behavior. In this particular application, extreme demands on reliability and quality give rise to numerous problems and open issues that need to be jointly identified and addressed by both academia and industry. In this article, we present an overview of the current state-of-the-art in the field of intelligent autonomous vehicles. We further discuss open problems and current research directions.

Wide adoption of mobile computing, smartphones, social networks and big data techniques have brought undoubtable advantages to society as such, as well as to its individuals. The downside of this diffusion of technology throughout society has already been well discussed. Single authors also pointed out the threats not only to the single individual, but to democratic society as a whole. However, suggestions or even practical approaches of how to mitigate these threats not only at the individual level ( Folks, keep your virus scanner up to date all the time! ), but for society itself, are rarely found up to this day. There is no simple solution to this problem, of course. Particularly not a small one that can be carried out by a single peer group. Rather, we want to motivate that there are different approaches to the shared common goal of preserving civil liberty for many individual groups of society. In this article, we focus on a strategy for computer scientists on how to perform their part in the big picture, and try to motivate this by calling up on their professional ethics.

The cerebral stroke is a major cause for death and disability. Clinical diagnosis, therapy, and research of stroke can considerably benefit from modern image acquisition methods, which enable a detailed analysis of cerebral blood vessel anatomy as well as an examination of macrovascular and tissue blood flow dynamics. However, visual screening of these datasets can be complex and time-consuming due to the vast amount of data. This article provides an overview of a dissertation, which addresses the problem of an automatic combined analysis and visualization of high-resolution 3D and spatiotemporal (4D) image sequences from the same patient to support diagnosis, treatment decision, and research of cerebrovascular diseases. Therefore, automatic methods for the cerebrovascular segmentation, analysis of the cerebral blood flow and tissue perfusion, as well as the combined quantitative analysis and visualization of the vessel morphology and blood flow dynamics were developed. Apart from a potential clinical application, the developed methods have already proven useful in multiple clinical research studies.