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A hybrid step-up converter for PV integration with wide input variation acceptability: comprehensive performance and reliability assessment

  • Yugal Kishor ORCID logo EMAIL logo , Ramnarayan Patel and Lalit Kumar Sahu
Published/Copyright: March 4, 2024

Abstract

A high-step-up DC–DC converter (DDC) is commonly used in micro-grids, renewable energy source (RES) integration, uninterruptible power supplies, hybrid vehicles, and other applications to deal with intermittency in power sources. Solar photovoltaic (SPV) is a prominent RES due to its many benefits, but its output voltage must be enhanced for high-voltage (HV) applications; hence, various topologies are suggested for desirable gain in the literature. Nevertheless, contemporary topologies exhibit restricted gain, higher device stress, analysis on restricted performance metrics, constrained handling capacity for input variations, relatively lower reliability, and suboptimal device utilization. This work investigates a new Z-source with switched-capacitor (HZSSC)-based hybrid step-up converter to solve the aforementioned restrictions and adapt PV voltage dynamics. Additionally, this paper presents MIL-HDBK-217F-based methodology for evaluating converter-level reliability, assessing the implications of device parametric variation on overall reliability, conducting a detailed analysis of figure of merits, performing thermal modeling, and executing small-signal-modeling to demonstrate operational efficacy. In-depth mathematical analysis of both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are conducted. The detailed comparison analysis shows that the suggested converter outperforms traditional converters in voltage-gain, voltage-stress, device-utilization, and reliability. Additionally, a 400 W, 220 V laboratory-scaled prototype shows 68 % reliability after 20 years. The hardware test outcomes validate the accuracy of both the mathematical investigation and simulation findings.


Corresponding author: Yugal Kishor, Department of Electrical Engineering, National Institute of Technology Raipur, Raipur, CG, India, E-mail:

  1. Research ethics: Not applicable.

  2. Author contributions: The authors have accepted responsibility for the entire content of this manuscript and approved its submission.

  3. Competing interests: The authors states no conflict of interest.

  4. Research funding: None declared.

  5. Data availability: Not applicable.

Appendix A
Figure A1: 
Temperature rise in HZSSC.
Figure A1:

Temperature rise in HZSSC.

Figure A2: 
Theoretical and experimental comparison of efficiency curves.
Figure A2:

Theoretical and experimental comparison of efficiency curves.

Figure A3: 
Device power loss bifurcation.
Figure A3:

Device power loss bifurcation.

Table A1:

Failure rate expressions and power loss related with each converter component.

Components Failure rate expressions Power loss (W) for P 0 = 400 W
Power MOSFET (Q 1 and Q 2) λ s  = λ B π T π A π E π Q 10.015
Power diode (D 1, D 2, D 0) λ d  = λ B π T π S π C π E π Q 12.53
Capacitors (C 1C 3, C 0) λ c  = λ B π T π C π V π SR π E π Q 5.82
Inductors (L 1L 3) λ i  = λ B π T π E π Q 3.63
Table A2:

HZSSC component parameters and failure rates using the MIL-HDBK-217F technique.

Components Factors Value λcomponent [ F a i l u r e s 10 6 h ]
Power MOSFET (Q 1 and Q 2) λ b 0.012
π T exp(−1925((1/(T J  + 273) − 1/298) λ Q1 = 9.98
π A 8 λ Q2 = 17
π Q 8
π E 9
Power diode (D 1, D 2, D 0) λb 0.025
π T exp(−2100((1/(T J  + 273)−1/298) λ D1 = 0.1704
π S = V s 2.43 0.0592 λ D2 = 0.081
π C 1 λ D0 = 0.0648
π E 8
π Q 9
Capacitors (C 1C 3, C 0) λb 0.0004 λ C1 = λ C2 = 0.041,
π T exp(−E a /(8.61 × 10−5) ((1/(T J  + 273) − 1/298)
π C 2.3
π V  = (S/5)3 + 1 10.5 λ C3 = 0.0317,
π SR 3.3 λ C0 = 0.043
π E 1
π Q 1
Inductors (L 1L 3) λb 0.00003 λ L1 = 0.000252,
π T exp(−0.11/(8.61 × 10−5) ((1/(T J  + 273) − 1/298) λ L2 = λ L3 = 0.000153
π E 6
π Q 1
Appendix B

Figure B1: 
The analysis evaluates the effect of changes in converter parameters on the reliability curve.
Figure B1:

The analysis evaluates the effect of changes in converter parameters on the reliability curve.

Appendix C

Figure C1: 
Performance comparison curves.
Figure C1:

Performance comparison curves.

Table C1:

Comparative performance assessment among existing step-up converters.

Topologies M CCM Device count Test parameters V in /V 0/f sw /P 0 ɳ max (%)
n s /n d /n c /n L /n T
[40] 1 D 1 2 D 1/1/3/3/8 12 V/22.9 V/40 kHz/10 W 85 at 8.82 W
[41] 2 2 D 1 2 D 1/2/3/2/8 10 V/60 V/30 kHz/36 W 85
[46] 1 + 3 D 1 D 2/2/3/3/10 20 V/250 V/40 kHz/200 W 93
[38] 1 + D 1 3 D 1/3/5/3/12 5 V/10 V/30 kHz/2 W 89.3
[43] 1 1 3 D 1/3/5/3/12 60 V/250 V/100 kHz/130 W 87
[47] 4 1 D 2/4/4/2/12 25 V/400 V/40 kHz/400 W 94.32
[48] with (n = 1) 2 ( 1 + D ) 1 D 1/6/3/2/12 24 V/350 V/50 kHz/500 W 91.45 at 500 W
[39] 3 + D 1 D 1/7/4/2/14 48 V/360 V/50 kHz/200 W 94 at 200 W
[33] 5 + D 1 D 2/5/4/3/14 30 V/320 V/100 kHz/200 W 91 at 200 W
[42] 3 2 D 1 2 D 1/5/6/2/14 48 V/250 V/100 kHz/130 W 94 at 50 W
[45] 3 2 D 1 2 D 1/4/6/3/14 33 V/400 V/100 kHz/400 W 91.25
[50] 2 ( 2 D ) ( 1 D ) 2 1/6/5/2/14 24 V/166 V/50 kHz/200 W 92.2 at 75 W
[51] 3 + D 1 D 2/5/3/4/14 24 V/200 V/100 kHz/200 W 96.53 at 100 W
[52] 3 3 D 2 D 2 ( 1 D ) ( 1 2 D ) 2/4/5/3/14 33 V/395 V/50 kHz/200 W 93.8 at 200 W
[37] 2 + D 1 2 D 1/5/7/3/16 24 V/365 V/40 kHz/150 W 92.8 at 50 W
[43] 1 1 4 D 1/4/7/4/16 40 V/400 V/30 kHz/100 W 94
[44] 2 + 2 D 1 4 D D 2 1/7/4/4/16 10 V/100 V/30 kHz/100 W 91
[53] 10 1 D 2/10/10/2/24 15 V/312.5 V/20 kHz/100 W 93.5 at 100 W
[49] 1 + 7 D 1 D 6/15/1/8/30 100 V/900 V/20 kHz/20 kW 94.5
HZSSC 3 2 D ( 1 3 D + 2 D 2 ) 2/3/4/3/12 12 V/98.9 V/100 kHz/400 W 92.26 at 152 W
  1. n s : MOSFET count, n d : Power diode count, n L : Inductor count, n c : Capacitor count, n T : Total components, ɳ max(%): Peak converter efficiency.

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Received: 2023-11-29
Accepted: 2024-02-03
Published Online: 2024-03-04

© 2024 Walter de Gruyter GmbH, Berlin/Boston

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