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Evaluation of Superimposed Sequence Components of Currents based Islanding Detection Scheme during DG Interconnections

  • Karan Sareen , Bhavesh R. Bhalja EMAIL logo and Rudra Prakash Maheshwari
Published/Copyright: December 1, 2015
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International Journal of Emerging Electric Power Systems
From the journal International Journal of Emerging Electric Power Systems Volume 17 Issue 1

Abstract

A new islanding detection scheme for distribution network containing different types of distributed generations (DGs) is presented in this paper. The proposed scheme is based on acquiring three phase current samples for full cycle duration of each simulation case of islanding/non-islanding conditions at the point of common coupling (PCC) of the targeted DG. Afterwards, superimposed positive & negative sequence components of current are calculated and continuously compared with pre-determined threshold values. Performance of the proposed scheme has been evaluated on diversified islanding and non-islanding events which were generated by modeling standard IEEE 34-bus system using PSCAD/EMTDC software package. The proposed scheme is capable to detect islanding condition rapidly even for perfect power balance situation for both synchronous and inverter based DGs. Furthermore, it remains stable during non-islanding events such as tripping of multiple DGs and different DG interconnection operating conditions. Therefore, the proposed scheme avoids nuisance tripping during diversified non-islanding events. At the end, comparison of the proposed scheme with the existing scheme clearly indicates its advantage over the existing scheme.

Keywords: islanding detection; superimposed sequence components of currents; distributed generations

1 Introduction

Islanding is a situation in which the distribution network remains energized even after isolating from grid intentionally or unintentionally. This is possible only when distribution network comprises of local loads and one or more Distributed Generators (DGs). In order to avoid damage of the generator, load, and for safety of personnel, islanding detection is an obligatory requirement for power distribution network containing different type and capacity of DGs. According to IEEE Std. 1547–2003 [1], any unintentional islanding event shall be detected not more than 2 sec.

Islanding detection technique can be broadly classified in to two categories: remote, and local. Remote technique uses communication between utilities and DGs whereas the local technique works on the locally measured parameters at the point of common coupling. Communication based islanding detection scheme have been presented by many researchers [2–4]. However, high cost of the equipments is the prime limitation of communication based scheme. Local islanding detection techniques can be further classified into three categories: passive, active, hybrid. Passive techniques [5–11] use locally available parameters or quantities like rate of change of frequency (ROCOF), rate of change of frequency over power (df/dP), rate of change of voltage (ROCOV), and change in the sequence components of voltage at PCC. Schemes based on ROCOF and df/dP depend on the mis-match between generation and load. These schemes fail to detect islanding situation when generation and load closely matched. These schemes offer large Non Detectable Zone (NDZ) and more nuisances tripping. Conversely, if the reactive power mis-match at the PCC is not considerable than the scheme based on ROCOV is not able to distinguish between islanding and non-islanding condition due to insignificant change in voltage.

Niaki et al. [11] presented empirical mode decomposition based detection scheme which is able to detect islanding even during zero active and reactive power mis-matches. Nevertheless, the above scheme may not give satisfactory results in case of synchronous based DG. Moreover, the said scheme has not considered diversified non-islanding events during which stability of the scheme can be guaranteed. Thereafter, many researchers have presented islanding detection methods based on phase angle estimation using phase-locked loop and total harmonic distortion of voltage [12–15]. However, long detection time in case of very small power mis-match is the major drawback of the above scheme. After that, other techniques based on Wavelet and S-transform has been presented by researchers [16–22]. High sampling frequency, inaccurate classification of time or frequency dependent information, and hardware complexity imposes limitation on Wavelet based schemes. The method based on S-transform requires more time compare to other time-frequency based methods. Moreover, it is not able to incorporate all the signals in predetermined Gaussian window. Afterward, various islanding detection techniques based on impedance measurement and rate of change of impedance (dz/dt) have been proposed by many researchers [23, 24]. However, initiation of nuisance tripping in case of non-islanding event (three phase fault on adjacent feeder) is the prime limitation of impedance and dz/dt based scheme.

Later on, islanding techniques based on neural network, support vector machine, and pattern recognition have been presented by different researchers [25–29]. However, complex training procedure, large requirement of training patterns and improper result during unseen patterns are several limitations of neural network based techniques. Subsequently, major disadvantage of pattern recognition based techniques is its “black box” nature that prohibits easy interpretation of the relationships between the response and predictor variables. Proper selection of features is highly desirable for authenticity of pattern recognition based technique which needs pre-processing of the acquired signals. This introduces delay in islanding detection. Most of the islanding techniques discussed above work perfectly for specific type of DG (either synchronous based DG or inverter based DG). Therefore, it is required to develop a new islanding detection technique that can rapidly detect the situation of islanding and at the same time avoid nuisance tripping during non-islanding events. In order to rectify the above problems, a new islanding detection scheme based on superimposed sequence component of current has been presented in this paper.

2 Proposed islanding detection scheme

Figure 1 shows flowchart of the proposed islanding detection scheme. A sampling frequency of 5 kHz (100 samples/cycle) at 50 Hz nominal frequency is used. Initially, one cycle data of three phase current signals are acquired from the point of common coupling of the targeted DG. Afterward, three phase values of current are converted in to phasor values of current with the help of phasor computation algorithm. The well-known process of phasor estimation has been used by researchers for more than last four decades. Discrete Fourier Transform (DFT) algorithm is most widely used algorithm which effectively removes integer harmonics. However, it does not give equally accurate result in case of estimation of the decaying DC component present in the signals. To remove accurately both integer as well as decaying DC component, Full cycle Modified Discrete Fourier Transform (MDFT) algorithm, as suggested in Ref. [30], is used instead of simple DFT algorithm,.

Figure 1: Proposed algorithm for islanding detection.
Figure 1:

Proposed algorithm for islanding detection.

Thereafter, phasor (“abc”) values of currents are converted into positive, negative and zero sequence components using eq. (1) as mentioned below [31]. Now, superimposed [32] positive and negative sequence component of current i.e. SI1 and SI2 are calculated, respectively, as represented in eqs (2) and (3).

(1)I0I1I2=13×1111aa21a2a×IaIbIC
(2)SI1=∑j=mm+n|I1j|−∑j=mm+n|I1j−n|
(3)SI2=∑j=mm+n|I2j|−∑j=mm+n|I2j−n|

Where, Ia, Ib and Ic are currents of phase a, b and c, respectively, measured at DG terminals and I1, I2 and I0 are positive, negative and zero sequence components, respectively. The complex operator a=1∠1200. Using a sliding window concept, the value of SI1 and SI2 are continuously compared with the predetermined threshold value ψ1 and ψ2, respectively. When the values of SI1 and SI2 are greater than the predetermined threshold values ψ1 and ψ2, respectively, islanding condition is detected. In this condition, the coil of the relay is energized which in turn gives signal to its contact. Due to closing of relay contact, the coil of auxiliary relay is energized which further trips its contact. Finally, the trip coil of generator breaker is energized and tripping command is initiated.

The proper discrimination in islanding and non-islanding event is highly depends on the proper selection of threshold values for SI1 and SI2. Two critical threshold levels, ψ1 and ψ2, are based on steady state of current value i.e. the impact of the change of current is reflected in the magnitude of the threshold, which is considered as an adaptive threshold. During grid connected mode, the current can vary due to unbalance in load. Thus, threshold value changes according to these conditions. In order to verify this condition, the actual value of load currents along with the positive and the negative sequence components of currents are recorded on Ganesh feeder (for load L1 mentioned in Figure 2 of manuscript). It has been observed from recorded values of positive and negative sequence current varies in the range of 0.495 pu to 0.796 pu and 0.012 pu to 0.06 pu, respectively. This is due to inequality in load currents in all phases and errors in CTs. It has been observed that the maximum value of threshold for superimposed positive and negative sequence components of current during all non-islanding conditions remains within 0.13 and 0.06, respectively. Hence, ψ1 and ψ2 is assigned a threshold value of 0.14 and 0.07, respectively.

Figure 2: Single line diagram of a sample power system network.
Figure 2:

Single line diagram of a sample power system network.

3 System study

In order to evaluate performance of the proposed scheme, a portion of an existing Indian power distribution network, as shown in Figure 2, is modeled using PSCAD/EMTDC software package [33].

With reference to Figure 2, DG-1 & DG-3 are taken as synchronous generators whereas DG-2 & DG-4 are considered as inverter based generators. The synchronous based DG includes a synchronous generator, an exciter and a governor. Conversely, inverter based DG is modeled based on solar photovoltaic module. Here, power is generated using 20 modules connected in series per array and 20 module strings in parallel per array. The total 108 cells are connected in series per module whereas 4 cell strings are connected in parallel per module. The amount of power that can be drawn by a solar cell depends on the operating point on the I-V curve and the maximum power output occurs around the knee point of the curve. A maximum power point tracker (MPPT) is a power electronic DC-DC converter inserted between the PV array and its load to ensure that the PV module always operates at its maximum power point as the temperature and load vary. Thereafter, three-phase inverter bride module is used and its output is given to PCC through step-up transformer.

4 Performance evaluation

In this section, performance of the proposed scheme during various islanding and non-islanding situations, as mentioned in previous section, is presented. In order to get a rebate/avoid a penalty in the electricity bill, most of the 11-kV feeders are operated above 0.9 power factor [34]. Hence, for all cases, 0.95 power factor is considered in this paper.

4.1 Performance of the proposed scheme under various non-islanding and islanding conditions

For all cases, the islanding situation is simulated at 3.4 s. Figures 3 and 4 shows the waveform of SI1 and SI2 during islanding condition with –4% and +5% active power mis-matches at DG-3 & DG-4, respectively. Furthermore, two different non-islanding events have also been given in each of the above figure. It is to be noted from both figures that the proposed scheme is capable to provide effective discrimination between islanding situation (as the waveform of SI1 and SI2 exceed the threshold value) and non-islanding events (the graphs of all non-islanding events remain well below the set threshold values).

Figure 3: Waveform of (a) SI1 and (b) SI2 during two different non-islanding events and islanding situation at DG-3 with –4% active power mis-matches.
Figure 3:

Waveform of (a) SI1 and (b) SI2 during two different non-islanding events and islanding situation at DG-3 with –4% active power mis-matches.

Figure 4: Waveform of (a) SI1 and (b) SI2 during two different non-islanding events and islanding with +5% active power mis-match at DG-4.
Figure 4:

Waveform of (a) SI1 and (b) SI2 during two different non-islanding events and islanding with +5% active power mis-match at DG-4.

Most of the existing schemes issue nuisance tripping in case of various non-islanding events such as switching of capacitor, switching of transformer and single-line to ground fault on adjacent feeder L3. Hence, performance of the proposed scheme has been evaluated during the said non-islanding events and results are shown in Figure 5. It has been observed from Figure 5 that the proposed scheme remains stable during different types of non-islanding events as the value of SI1 and SI2 remain well below the threshold values.

Figure 5: Waveform of (a) SI1 and (b) SI2 during three different non-islanding events.
Figure 5:

Waveform of (a) SI1 and (b) SI2 during three different non-islanding events.

Now, there are some critical situations where most of the conventional scheme fails, predominantly, in case of perfect power balance situation. For this situation, simulations were performed for an islanding condition with zero active and reactive power mis-matches at DG-1 to DG-4. It is to be noted from Figure 6 that the proposed scheme is able to detect islanding situation even at zero active and reactive power mis-matches.

Figure 6: Waveform of (a) SI1 and (b) SI2 during islanding with 0% active power and reactive power mis-match at DG-1, DG-2, DG-3 and DG-4, respectively.
Figure 6:

Waveform of (a) SI1 and (b) SI2 during islanding with 0% active power and reactive power mis-match at DG-1, DG-2, DG-3 and DG-4, respectively.

4.2 Performance of proposed scheme during change in loading conditions

The performance of the proposed scheme has been evaluated during 0%, 15%, 30%, 50% and 70% increase in load at DG terminal and results are shown in Figure 7. It is to be noted from Figure 7 that the magnitude of SI1 and SI2 during different loading conditions remains well below the threshold value. Hence, the proposed scheme is capable to provide better stability during diversified non-islanding events and hence, avoids nuisance tripping.

Figure 7: Waveform of SI1 (a) and SI2 (b) considering wide range of loading conditions.
Figure 7:

Waveform of SI1 (a) and SI2 (b) considering wide range of loading conditions.

4.3 Performance of the proposed scheme during multiple DG tripping

Performance of the proposed scheme has been evaluated during simultaneous tripping of two or more DGs. The simulation results are shown in Figure 8 in terms of waveform of SI1 and SI2 during tripping of single DG (synchronous DG-3), simultaneous tripping of two inverter based DGs (DG-2 and DG-4) and two synchronous based DGs (DG-1 and DG-3). Subsequently, the simulation results in case of tripping of one synchronous based DG & one inverter based DG, simultaneous tripping of two inverter based DGs & one synchronous based DG and two synchronous based DGs & one inverter based DG are also shown in Figure 9. It is to be noted from Figures 8 and 9 that the values of SI1 and SI2 remain well below the threshold value. Therefore, the proposed scheme remains stable during diversified range of non-islanding events.

Figure 8: Performance of the proposed scheme during simultaneous tripping of two DGs.
Figure 8:

Performance of the proposed scheme during simultaneous tripping of two DGs.

Figure 9: Performance of proposed scheme during simultaneous tripping of three DGs.
Figure 9:

Performance of proposed scheme during simultaneous tripping of three DGs.

4.4 Performance of the proposed scheme during different DG interconnection operating conditions

Performance of the proposed scheme has been evaluated during normal and maximum loading condition for two different types of DGs. Figures 10 and 11 show waveform of SI1 and SI2 during normal and maximum loading condition for inverter and synchronous based DG (DG-2 and DG-1), respectively. It is to be noted from both figures that the magnitude of SI1 and SI2 during such situations remains well below the threshold value and hence, nuisance tripping is avoided.

Figure 10: Performance of the proposed scheme in terms of (a) SI1 (b) SI2 during normal and maximum loading condition at inverter based DG-2.
Figure 10:

Performance of the proposed scheme in terms of (a) SI1 (b) SI2 during normal and maximum loading condition at inverter based DG-2.

Figure 11: Performance of the proposed scheme in terms of (a) SI1 (b) SI2 during normal and maximum loading condition at synchronous based DG-1.
Figure 11:

Performance of the proposed scheme in terms of (a) SI1 (b) SI2 during normal and maximum loading condition at synchronous based DG-1.

4.5 Performance of the proposed scheme on IEEE 34-bus test system

In order to test the proposed algorithm on a larger network, IEEE 34-bus system, as shown in Figure 12, is utilized. Modeling of this system has been carried out once again in PSCAD/EMTDC software package. The simulation results given by the proposed scheme during islanding condition having perfect power balance condition is shown in Figure 13. It is to be noted from Figure 13 that the proposed scheme is capable to detect islanding situation even for 0% active and reactive power mis-matches for larger network.

Figure 12: Single line diagram of IEEE 34-bus system.
Figure 12:

Single line diagram of IEEE 34-bus system.

Figure 13: Performance of the proposed scheme during islanding having perfect power balance condition for IEEE 34-bus system.
Figure 13:

Performance of the proposed scheme during islanding having perfect power balance condition for IEEE 34-bus system.

Furthermore, performance of the proposed scheme has also been evaluated during specific type of non-islanding event i.e. L-G fault on feeder located between bus-21 and bus-25. The simulation results are shown in Figure 14. It is to be noted from Figure 14 that the proposed scheme remains stable during non-islanding event simulated on IEEE 34-bus system and hence, does not initiate nuisance tripping.

Figure 14: Performance of the proposed scheme during non-islanding event (L-G fault on adjacent feeder) for IEEE 34-bus system.
Figure 14:

Performance of the proposed scheme during non-islanding event (L-G fault on adjacent feeder) for IEEE 34-bus system.

4.6 Comparison of the proposed scheme with existing schemes

Comparative evaluation of the proposed scheme with the scheme based on ROCPAD [35] is also carried out. Figure 15 shows performance of ROCPAD based scheme during islanding situation with zero active power mismatch and also in case of non-islanding event (L-G fault on adjacent feeder). It is to be noted from Figure 15 that though the scheme based on ROCPAD operates successfully during islanding condition it issues nuisance tripping during non-islanding event as the locus of ROCPAD crosses the threshold value. Conversely, as shown in Figure 5, the proposed scheme remains stable during such type of non-islanding event. Hence, frequent nuisance tripping due to such type of fault (which is very common as 80–90% of faults on overhead distribution feeder are of single line-to-ground) can be avoided.

Figure 15: Performance of ROCPAD scheme (a) during Islanding (0% active power mismatch) (b) during non-islanding event due to LG fault on adjacent feeder.
Figure 15:

Performance of ROCPAD scheme (a) during Islanding (0% active power mismatch) (b) during non-islanding event due to LG fault on adjacent feeder.

5 Advantages of the proposed scheme over existing schemes

  1. The proposed scheme does not depend on type of DG (synchronous/inverter based DG) and detects islanding condition even with zero active and reactive power mis-matches.

  2. Nuisance tripping in case of various non-islanding events is a major problem for the existing schemes. The proposed scheme avoids such type of nuisance tripping and also provides stability during tripping of two or more DGs.

  3. The proposed scheme provides satisfactorily results on larger netwwork such as IEEE 34-bus system.

  4. Different existing islanding detection schemes based on wavelet, pattern recognition, neural network, fuzzy logic etc; require pre/post processing of current and/or voltage signals and hence, necessitate more hardware and also adds time delay. Conversely, the proposed scheme is faster and involves less hardware as it does not require pre/post processing of acquired signals.

  5. The proposed scheme can be easily implemented in the practical field as it requires less hardware compared to the techniques based on Wavelet transform/pattern recognition which need more hardware.

6 Conclusion

A new islanding detection scheme based on superimposed sequence components of currents is presented in this paper. Performance of the proposed scheme has been evaluated on diversified islanding and non-islanding events which were generated by modeling standard IEEE 34-bus system using PSCAD/EMTDC software package. Effective discrimination between islanding situation and non-islanding events has been achieved by the proposed scheme. Furthermore, the proposed scheme remains stable during various non-islanding events and hence, avoids nuisance tripping which were not possible in the existing schemes. Moreover, the proposed scheme detects islanding condition quickly irrespective of type of DGs connected in the network. At the end, comparison of the proposed scheme with the existing scheme clearly indicates its advantage over the existing scheme. The proposed scheme is simple, robust and requires reduced hardware compared to schemes based on pattern recognition/neural network/fuzzy logic.

Funding statement: Funding: This research is supported by the Ministry of Science and Technology, Department of Science and Technology (DST), Government of India, under project No. SB/S3/EECE/037/2015.

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APPENDIX

1. Synchronous Generators Parameters
Rated RMS Line-to-Neutral voltage(Vrms): 0.133 [KV]
Rated RMS Line current (Irms): 2.510 [KA]
Base Angular Frequency (ω): 314.15[rad]
Inertia Constant (H): 3.117[s]
Mechanical Friction and windage (Dm): 0.04 [pu]
Neutral Series Resistance (Rs): 1.0E5[pu]
Neutral Series Reactance (Xs): 0 [pu]
Iron Loss Resistance (Rm): 0.5 [pu]
Exciter Parameters
Rectifier smoothing time constant (T1): 0.02 [s]
Controller lead time constant (TA): 0.12 [s]
Controller lag time constant (TB): 0.07 [s]
Exciter time constant (TE): 0.02 [s]
Exciter gain (K): 100[pu]
Maximum field voltage (EMAX): 5 [pu]
Minimum field voltage (EMIN): -5[pu]
L-G Voltage base (KV,RMS): 0.133 [KV]
Line current base (KA, RMS): 2.510 [KA]
2. Solar Panel Parameters: 0.133 [KV]
Rated Line-to-Neutral voltage (Vrms) at the output terminal of inverter
Rated RMS Line current (Irms) at the output terminal of inverter:1.250 [KA]
Solar Radiation: 622.222[Watt/ m2]
Temperature: 50 [°C]
DC bus voltage at the input terminal of three-phase inverter: 0.500 [KV]
DC voltage at input terminal of step down chopper (or at the output terminal of PV array): 1.100 [KV]
DC current at input terminal of step down chopper (or at the output terminal of PV array): 0.13 [KA]
Received: 2015-7-20
Revised: 2015-10-19
Accepted: 2015-11-6
Published Online: 2015-12-1
Published in Print: 2016-2-1

©2016 by De Gruyter

Articles in the same Issue

  1. Frontmatter
  2. Research Articles
  3. Evaluation of Superimposed Sequence Components of Currents based Islanding Detection Scheme during DG Interconnections
  4. Dynamics of a Flywheel Energy Storage System Supporting a Wind Turbine Generator in a Microgrid
  5. Distance Relaying with Power Swing Detection based on Voltage and Reactive Power Sensitivity
  6. The Periodic Characteristics of Harmonic Measurement Errors with the Initial Sampling Time
  7. Implementing PAT with Standards
  8. Experimental Hydrogen Plant with Metal Hydrides to Store and Generate Electrical Power
https://doi.org/10.1515/ijeeps-2015-0121
Keywords for this article
islanding detection; superimposed sequence components of currents; distributed generations

Articles in the same Issue

  1. Frontmatter
  2. Research Articles
  3. Evaluation of Superimposed Sequence Components of Currents based Islanding Detection Scheme during DG Interconnections
  4. Dynamics of a Flywheel Energy Storage System Supporting a Wind Turbine Generator in a Microgrid
  5. Distance Relaying with Power Swing Detection based on Voltage and Reactive Power Sensitivity
  6. The Periodic Characteristics of Harmonic Measurement Errors with the Initial Sampling Time
  7. Implementing PAT with Standards
  8. Experimental Hydrogen Plant with Metal Hydrides to Store and Generate Electrical Power
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