High-performance silicon polarization switch based on a Mach–Zehnder interferometer integrated with polarization-dependent mode converters

1 Introduction

Silicon photonics have attracted more and more attention because it is emerging as one of the most prospective optoelectronic integrated platforms due to its high integration density and CMOS compatibility [1], [2], [3]. However, silicon photonic devices often severely suffer from polarization mode dispersion and polarization-dependent loss due to the ultra-high index-contrast and structural asymmetry of silicon photonic waveguides [4]. A general solution for this issue is using a polarization diversity system that contains polarization control devices like polarizer [5], [6], [7], polarization beam splitters (PBSs) [8], [9], [10], polarization rotators (PRs) [11, 12], as well as polarization splitter-rotators (PSRs) [13], [14], [15], etc. To date, PRs have been demonstrated by using vertical asymmetric structures, including double-core waveguides [11], metasurface waveguides [12], adiabatic tapers [13], as well as asymmetric directional couplers [14]. However, most of these reported PRs are static, while reconfigurable polarization switches, which can dynamically tune the ratio of two polarization components, are highly sought in various applications including polarization-diversity optical networks [16], [17], [18], polarization-encoded quantum technologies [19], [20], [21], [22], [23], and polarization-switched coherent communications [24], [25], [26], [27], etc. Until now, there have been only a very few polarization switches reported [28], [29], [30], [31], [32]. In Ref. [28], a polarization switch based on mode hybridness was proposed by incorporating two polarization rotator-splitters and two MZIs. It has a polarization extinction ratio (PER) of 13 dB and an excess loss (EL) of 2.5 dB. In Ref. [29], an electrically-tunable polarization switch was demonstrated by introducing an out-of-plane optical waveguide to access berry’s phase. It has a PER of 10 dB and an EL of ∼1 dB. In Ref. [30], a polarization switch with a PER of ∼20 dB was demonstrated by cascading three PRs based on a partially-etched waveguide and three electrically-tunable phase-shifters, which however is complex and as long as thousands of micrometers. Therefore, a compact polarization switch with high performances such as high PERs, low ELs and broad bandwidths is still absent.

In this work, we propose and demonstrate a compact and CMOS-compatible silicon polarization switch that can be reconfigured thermally. The proposed device is constructed with a Mach–Zehnder interferometer (MZI) based on bi-level ridge waveguides and two polarization-dependent mode converters (PDMCs) at the input/output ends. The PDMCs enable the mode conversion between the TM₀ and TE₁ modes, and also provide an adiabatic transmission for the launched TE₀ mode. For the MZI structure, there are two 1 × 2 dual-mode 3-dB power splitters (PSs) based on a triple-core adiabatic taper, and two thermally-tunable phase-shifters embedded in the arms. In particular, the dual-mode 3-dB couplers split the TE₀ or TE₁ modes into two TE₀ modes equally. The phase-shifters are used to control the phase difference of these two TE₀ modes propagating along the MZI arms. In this way, the polarization ratio of light can be effectively manipulated as desired. The device fabricated with CMOS-compatible foundry processes shows an EL of ∼1.2 dB for the TE₀ and TM₀ modes and the power consumption for switching is about 26 mW. The PER of the present polarization switch is about 20 dB in the wavelength range of 1530–1600 nm for both polarizations at the on/off states.

2 Principle and structural design

Figure 1a shows the top view of the proposed polarization switch, which consists of a MZI connected with two PDMCs at the input/output ends. The MZI is constructed with two 1 × 2 dual-mode 3-dB PSs based on a triple-core adiabatic taper and two thermally-tunable phase-shifters embedded in the arms. Figure 1b and c show the enlarged views of the PDMC and PS as well as the cross-section of the phase-shifter. Here, we use SOI ridge waveguides, which have a core height of h_c = 220 nm and a slab height of h_s = 70 nm, making it compatible with the standard foundry process. The buried oxide layer and the silica upper cladding layer are both 2 μm, and the metal micro-heater of the phase-shifter is located upon the silica upper-cladding of the MZI’s arms.

Figure 1:

Schematic configuration of the proposed polarization switch.

(a) The top view; (b) the PDMC and PS regions; and (c) the cross-section of the ridge waveguide of the phase shifter.

As shown in Figure 1a, when the TE₀ mode is launched, it passes through the PDMC adiabatically and is split into two parts with the same phase by the triple-core PS. These two parts of power are carried by the TE₀ modes and then recombined to the TE₀ or TE₁ modes, which depends on the phase-shifting Δφ introduced thermally by the phase-shifter. When Δφ = 0, one has the TE₀ mode at the output of the 2 × 1 triple-core PS and finally outputs as the TE₀ mode even with the PDMC. When Δφ = π, one has the TE₁ mode at the output of the 2 × 1 triple-core PS and finally converted to be the TM₀ mode with the PDMC at the output end. In contrast, the launched TM₀ mode is converted to the TE₁ mode by the PDMC, and then is split into two parts with a phase difference of π by the triple-core PS. These two parts of power are carried by the TE₀ modes and then recombined to the TE₀ or TE₁ mode, depending on the phase-shifting Δφ. When Δφ = 0, one has the TE₁ mode at the output of the 2 × 1 triple-core PS and finally converted to be the TM₀ mode with the PDMC at the output end. When Δφ = π, one has the TE₀ mode at the output of the 2 × 1 triple-core PS and finally outputs as the TE₀ mode even with the PDMC. In this way, we can selectively realize the polarization conversion of the TE₀–TM₀ modes by thermally controlling the phase difference Δφ of the two arms of the MZI.

The PDMC design is based on the mode hybridness and the mode evolution in an adiabatic taper based on an SOI ridge waveguide with vertical asymmetry, as proposed previously [28]. Here, a bi-level tapered waveguide with a length of L₁ is used, as shown in Figure 1b. The width of the top-ridge is linearly tapered from w_b1 to w_b2 while the bottom-ridge is accordingly tapered from w_b1 to w_s. The calculated mode effective index n_eff for the bi-level ridge waveguide is shown in Figure 2a. It can be seen that the dispersion curves for the TM₀ and TE₁ modes are close to each other when the waveguide width is around w_h = 0.52 μm, where the mode hybridness happens. In order to achieve the TM₀–TE₁ mode conversion, we choose the taper end-widths as w_b1 = 0.4 μm and w_b2 = 0.8 μm, so that the taper width w_h is in the range of w_b1 < w_h < w_b2. Meanwhile, the bottom-ridge width w_s at the taper end is chosen as wide as 2 μm. The TM₀–TE₁ mode conversion efficiency is calculated with the eigenmode expansion (EME) solver for the case with different slab heights of h_s = 35, 70, 110, 150 nm as the length L₁ varies, as shown in Figure 2b. It can be seen that the length for the PDMC can be minimized when choosing h_s = 70 nm. Furthermore, the height of h_s = 70 nm is advisable according to the standard MPW process provided by the foundry. As a result, we choose the slab height as h_s = 70 nm. Then the calculated TE₀–TE₀ and TM₀–TE₁ mode conversion efficiencies are shown in Figure 2c and d. It can be seen that the efficiency for the TE₀–TE₀ mode conversion is higher than 99.9% when L₁ > 20 μm, as shown in Figure 2b. On the other hand, the efficiency for the TM₀–TE₁ mode conversion is larger than 99.9% when L₁ > 50 μm, as shown in Figure 2c. Therefore, we choose L₁ = 60 μm to have high efficiency for both TE₀–TE₀ and TM₀–TE₁ mode conversions as well as large fabrication tolerances for the core-width deviations. Light propagation in the designed PDMC is simulated for the launched TE₀ and TM₀ modes with the FDTD method, as shown in Figure 3a and b. The corresponding transmission spectra are shown in Figure 3c and d. It can be seen that the launched TE₀-mode transmission is lossless almost while the launched TM₀ mode is converted to the TE₁ mode with an ultra-low loss less than 0.08 dB and a high extinction ratio (ER) larger than 22 dB in a broad wavelength range of 1500–1600 nm.

Figure 2:

Design of the PDMC. (a) Calculated mode effective index n_eff for the bi-level ridge waveguide; (b) calculated TM₀–TE₁ mode conversion efficiency as the taper length L₁ varies for different slab heights h_s; (c) calculated TE₀–TE₀ mode conversion efficiency as the taper length L₁ varies (here, h_s = 70 nm); and (d) calculated TM₀–TE₁ mode conversion efficiency as the taper length L₁ varies (here, h_s = 70 nm).

Figure 3:

Simulated light propagation in the designed PDMC for the launched TE₀ (a) and TM₀ (b) modes with the FDTD method; and calculated transmission spectra in the designed PDMC for the launched TE₀ (c) and TM₀ (d) modes.

In order to simultaneously split the TE₀ and TE₁ modes with a splitting ratio of 50%:50%, the PS should be designed carefully. However, the design of using a regular directional coupler, a regular multimode interferometer as well as a regular Y-branch does not work well for both modes due to the high loss. Here, a 1 × 2 PS based on a triple-core adiabatic taper is introduced [33], as shown in Figure 1b. The middle core is tapered linearly from w_b3 to w_b4 with a length of L₃, while the two identical side cores are from w_a1 to w_a2. The gap between the middle core and the side core has a uniform width of w_g1. In the triple-core taper, the TE₀ or TE₁ modes launched from the middle core are gradually converted to two decoupled TE₀ modes supported in the two side cores. These two decoupled TE₀ modes have a phase difference of 0 or π. The PS can be designed according to the following guidance.

1. The width w_b3 at the input end should be wide enough and the width w_a1 should be narrow enough so that the two lowest-order supermodes at the input end are localized very well in the middle core. In this way, the mode mismatch at the junction connecting to the input section can be minimized.

2. The width w_b4 at the output end should be narrow enough and the width w_a2 should be wide enough so that the two lowest-order supermodes are localized very well in the side cores. In this way, the mode mismatch at the junction connecting to the output section can be minimized.

3. The length L₃ should be long enough to ensure the adiabatic transition for the TE₀ and TE₁ modes.

Considering the fabrication limitation, the widths w_b4, w_a1 and w_g1 are chosen to be 120 nm. Our calculation shows that >99% power of the TE₀ and TE₁ modes are well confined in the middle core region when w_b3 = 0.9 μm at the input end. Similarly, we choose w_a2 = 0.4 μm at the output end. Figure 4a and b shows the calculated mode profiles of the TE₀ and TE₁ modes at the input and output ends of the triple-core PS. As expected, these modes at the input end are well confined in the middle core region [see Figure 4a] and these modes at the output end are well confined in the side-core region [see Figure 4b]. Therefore, the mode-mismatch loss at the junctions connecting to the input/output sections is very low. Figure 4c shows the transmissions in the PS as the length L₃ varies. The transmission efficiencies of the TE₀ and TE₁ modes are both higher than 99% when L₃ > 25 μm. Figure 5a and b show the simulated light propagations of the TE₀ and TE₁ modes launched from the input end of the designed PS with L₃ = 30 μm by using the FDTD method. The calculated power splitting ratios for the TE₀ and TE₁ modes are shown in Figure 6a and b. As it can be seen, the designed PS can split the TE₀ and TE₁ modes equally with a very low EL less than 0.01 dB in the wavelength range of 1500–1600 nm.

Figure 4:

The mode profiles of the TE₀ and TE₁ modes at the input end (a) and the output end (b) of the triple-core waveguide of the PS. (c) Simulated conversion efficiencies of the TE₀–TE₀ and TE₁–TE₁ in the triple-core waveguide as the length L₃ varies.

Figure 5:

Simulated light propagation in the designed power splitter for the launched TE₀ (a) and TE₁ (b) modes.

Figure 6:

Simulated power splitting ratio of the designed power splitter for the TE₀ (a) and TE₁ (b) modes.

The phase-shifters of the MZI works based on the thermo-optic effect of silicon photonic waveguides. One arm of the MZI is heated by the metal micro-heater to introduce the desired phase difference Δφ of 0 or π, depending on the injecting current. The gap w_g2 between the two arms is chosen as 12 μm to decrease the thermal crosstalk, while the length of the S bends is 14 μm to guarantee adiabatic transition. The length of the two arms is chosen as 40 μm, and the total length for the designed polarization switch is about 246 μm. Table 1 gives all the key parameters for the designed polarization switch. When there is no phase difference introduced in the phase-shifter, the propagation of the launched TE₀ and TM₀ modes in the proposed polarization switch are shown in Figure 7a and b, respectively. Here, the input TE₀ and TM₀ modes finally output from the output port without polarization conversion. Figure 7c and d show the simulated light propagation of the launched TE₀ and TM₀ modes in the designed polarization switch when a phase difference of π is introduced between the MZI arms. Here, it can be seen the launched TE₀ and TM₀ modes are converted successfully. Figure 8a and b show the corresponding transmissions for the launched TE₀ and TM₀ modes when Δφ = 0. In this case, both TE₀ and TM₀ modes have a low EL of <0.45 dB (>90%) and a very high PER of >90 dB in an ultra-broad wavelength range. Figure 8c and d show the corresponding transmissions for the launched TE₀ and TM₀ modes when Δφ = π. In this case, the TE₀–TM₀ and TM₀–TE₀ mode conversions have a low EL of <0.4 dB (>91%) and a high PER of >20 dB in the wavelength range of 1530–1600 nm. The bandwidth is mainly limited by the dispersion of MZI structure and can be extended by further shorting the MZI’s arm length L₅. The fabrication tolerance of the proposed polarization switch is mainly determined by the PDMCs and the PSs. These two parts both work with the principle of adiabatic mode evolution, which has been proved to be fabrication-tolerant [28, 33]. Therefore, the proposed polarization switch has a large fabrication tolerance in principle.

Figure 7:

Simulated light propagation of the designed polarization switch for the launched TE₀ (a) and TM₀ (b) modes with Δφ = 0; simulated light propagation of the designed polarization switch for the launched TE₀ (c) and TM0 (d) modes with Δφ = π.

Figure 8:

Simulated light transmissions of the designed polarization switch for the launched TE₀ (a) and TM₀ (b) modes with Δφ = 0; simulated light propagation of the designed polarization switch for the launched TE₀ (c) and TM₀ (d) modes with Δφ = π.

3 Fabrication and results

The designed device was then fabricated with the E-beam lithography foundry process. Metal micro-heaters of Cr (20 nm)/Ti (200 nm) alloy are used as a heater. Figure 9a shows the optical microscopy images of the fabricated device. Two high-performance PBSs [9] with efficient TE-/TM-type grating couplers are connected at the input/output ports of the present device to conveniently characterize the responses of the TE₀/TM₀ modes. Figure 9b shows the enlarged view of the MZI consisting of the dual-mode 3-dB PSs and the phase shifters.

Figure 9:

The optical microscopy images of the fabricated polarization switch. (a) The optical microscopy images for the fabricated polarization switch with two PBSs; and (b) the enlarged view of MZI with power splitters and phase shifters.

For the characterization of the fabricated devices, an amplified spontaneous emission (ASE) light source was used. The polarization state of light is adjusted to the desired one by using a fiber polarizer and a polarization controller. The polarized light is then coupled to the chip through the TE- or TM-type gratings. At the output side, light is routed to the port corresponding to the TE₀ or TM₀ modes by using a PBS and analyzed by an optical spectrum analyzer. The measured transmissions are normalized by a straight waveguide fabricated on the same chip. Figure 10a shows the measured transmissions at the output ports for the launched TE₀ mode when the heater is off. In this case, no polarization rotation is observed almost, and the switch has a low loss of ∼1.2 dB and a PER higher than 25 dB in the wavelength range of 1530–1600 nm. By excluding the EL of ∼0.6 dB from the two PBSs, the present polarization switch itself has a low EL of ∼0.6 dB. The low EL is attributed that the PRs and the PSs working with the adiabatic mode evolution principle and respectively have ultra-low Els of <0.08 dB and <0.01 dB in theory. When the heater is on with a power 26 mW, the launched TE₀ mode is switched to the TM₀ mode with a PER of >20 dB, as shown in Figure 10b.

Figure 10:

Measured transmissions of the fabricated polarization switch for the launched TE₀ (a) and TM₀ (b) modes when it is off; measured transmissions of the fabricated polarization switch for the launched TE₀ (c) and TM₀ (d) modes when it is on.

Figure 10c and d show the measured transmission at the output ports for the launched TM₀ mode when the heater is off and on, respectively. When the heater is off, one has the TM₀ mode at the output port with a low loss of ∼1.1 dB and a high PER of >28 dB. As shown in Figure 10d, when the heater is on, one has an efficient TM₀–TE₀ mode conversion with a PER of >19 dB. When the heating power is varied from 0 to 26 mW, the PER of light at the output port can be tuned freely and a tunable PR is achieved. The measured transmissions do not show a deep notch in the wavelength around the desired central wavelength as shown in Figure 10b and d, because the power splitting ratio is not 50%:50% perfectly due to the fabrication error and a perfect phase-shifting of π is not achieved at the desired wavelength due to the inaccurate calibration in the experiment. Table 2 gives a summary of those reported polarization switches. As shown in Table 2, the present device shows the best overall performance, like compact footprints, high PERs, and low losses. Especially, it has the largest bandwidth, owing to the introduction of an adiabatic 3-dB triple-core PS.

4 Conclusions

In conclusion, we have proposed and demonstrated a novel high-performance polarization switch by using a 1 × 1 MZI integrated with two PDMCs at the input/output ends. The PDMCs have been designed to enable a low-loss adiabatic transmission for the launched TE₀ mode and an efficient mode conversion from the launched TM₀ mode to the TE₁ mode by utilizing the mode hybridness and the adiabatic mode evolution in an SOI ridge waveguide taper. For the present MZI, two 1×2 dual-mode 3-dB PSs have been introduced with low ELs and uniform power splitting for the TE₀ and TE₁ modes by using a triple-core adiabatic taper. It has been demonstrated that the polarization states of light can be dynamically switched by tuning the phase difference between the MZI arms. The ELs are about 0.6 dB and the PERs are >20 dB for both TE₀ and TM₀ modes in the wavelength range of 1530–1600 nm. Furthermore, the present polarization switch has a compact footprint of 246 × 150 μm². It will be useful as a key element in many on-chip photonic systems.