| Title | | Check model, local libraries, and referenced models for known upgrade issues |
| TitleID | | mathworks.design.Update |
|
| Title | | Identify unconnected lines, input ports, and output ports |
| TitleID | | mathworks.design.UnconnectedLinesPorts |
|
| Title | | Check root model Inport block specifications |
| TitleID | | mathworks.design.RootInportSpec |
|
| Title | | Identify blocks using one-based indexing |
| TitleID | | mathworks.codegen.cgsl_0101 |
|
| Title | | Check solver for code generation |
| TitleID | | mathworks.codegen.SolverCodeGen |
|
| Title | | Identify questionable blocks within the specified system |
| TitleID | | mathworks.codegen.QuestionableBlks |
|
| Title | | Identify lookup table blocks that generate expensive out-of-range checking code |
| TitleID | | mathworks.codegen.LUTRangeCheckCode |
|
| Title | | Check output types of logic blocks |
| TitleID | | mathworks.codegen.LogicBlockUseNonBooleanOutput |
|
| Title | | Check the hardware implementation |
| TitleID | | mathworks.codegen.HWImplementation |
|
| Title | | Check optimization settings |
| TitleID | | mathworks.design.OptimizationSettings |
|
| Title | | Identify questionable software environment specifications |
| TitleID | | mathworks.codegen.SWEnvironmentSpec |
|
| Title | | Identify questionable code instrumentation (data I/O) |
| TitleID | | mathworks.codegen.CodeInstrumentation |
|
| Title | | Check for blocks that have constraints on tunable parameters |
| TitleID | | mathworks.codegen.ConstraintsTunableParam |
|
| Title | | Check for parameter tunability information ignored for referenced models |
| TitleID | | mathworks.design.ParamTunabilityIgnored |
|
| Title | | Check for implicit signal resolution |
| TitleID | | mathworks.design.ImplicitSignalResolution |
|
| Title | | Check for optimal bus virtuality |
| TitleID | | mathworks.design.OptBusVirtuality |
|
| Title | | Check for calls to slDataTypeAndScale() |
| TitleID | | mathworks.design.CallslDataTypeAndScale |
|
| Title | | Check for Discrete-Time Integrator blocks with initial condition uncertainty |
| TitleID | | mathworks.design.DiscreteTimeIntegratorInitCondition |
|
| Title | | Identify disabled library links |
| TitleID | | mathworks.design.DisabledLibLinks |
|
| Title | | Identify parameterized library links |
| TitleID | | mathworks.design.ParameterizedLibLinks |
|
| Title | | Identify unresolved library links |
| TitleID | | mathworks.design.UnresolvedLibLinks |
|
| Title | | Check usage of function-call connections |
| TitleID | | mathworks.design.CheckForProperFcnCallUsage |
|
| Title | | Check model configuration settings against code generation objectives |
| TitleID | | mathworks.codegen.CodeGenSanity |
|
| Title | | Check for efficiency optimization parameters |
| TitleID | | mathworks.codegen.checkEnableMemcpy |
|
| Title | | Check model simulation configuration |
| TitleID | | mathworks.fpa.CheckModelSimulationConfiguration |
|
| Title | | Verify hardware selection |
| TitleID | | mathworks.fpa.CheckHardwareSelection |
|
| Title | | Check model Diagnostics Data Validity settings |
| TitleID | | mathworks.fpa.CheckDataValidityDiagnosticsForParameters |
|
| Title | | Simulation range checking |
| TitleID | | mathworks.fpa.CheckSimulationRangeChecking |
|
| Title | | Verify explicit signal resolution |
| TitleID | | mathworks.fpa.CheckImplicitSignalResolution |
|
| Title | | Check strong data typing with Simulink I/O |
| TitleID | | mathworks.fpa.CheckStrongDataTypingWithSimulinkIO |
|
| Title | | Address unsupported blocks |
| TitleID | | mathworks.fpa.CheckUnsupportedBlocks |
|
| Title | | Specify block minimum and maximum values |
| TitleID | | mathworks.fpa.CheckSpecifyDesignMinMaxValue |
|
| Title | | Review locked data type settings |
| TitleID | | mathworks.fpa.CheckSummarizeLockDownKnownScaling |
|
| Title | | Return to Fixed-Point Tool to Perform Data Typing and Scaling |
| TitleID | | mathworks.fpa.launchFPT |
|
| Title | | Check for blocks not recommended for MISRA-C:2004 compliance |
| TitleID | | mathworks.misra.BlkSupport |
|
| Title | | Check configuration parameters for MISRA-C:2004 compliance |
| TitleID | | mathworks.misra.CodeGenSettings |
|
| Title | | Runtime diagnostics for S-functions |
| TitleID | | mathworks.design.DiagnosticSFcn |
|
| Title | | Check if Read/Write diagnostics are enabled for Data Store blocks |
| TitleID | | mathworks.design.DiagnosticDataStoreBlk |
|
| Title | | Check Data Store Memory blocks for multitasking, strong typing, and shadowing issues |
| TitleID | | mathworks.design.DataStoreMemoryBlkIssue |
|
| Title | | Check for model reference configuration mismatch |
| TitleID | | mathworks.codegen.MdlrefConfigMismatch |
|
| Title | | Check update diagram status |
| TitleID | | mathworks.fpa.CheckUpdateDiagramStatus |
|
| Title | | Set up signal logging |
| TitleID | | mathworks.fpa.CheckSetupSignalLogging |
|
| Title | | Create reference data |
| TitleID | | mathworks.fpa.CheckCreateReferenceData |
|
| Title | | Implement logic signals as Boolean data |
| TitleID | | mathworks.fpa.CheckImplementLogicSignalsAsBooleanData |
|
| Title | | Check for removing redundant specification between signal objects and blocks |
| TitleID | | mathworks.fpa.CheckAssociateSDOWithBlocks |
|
| Title | | Check for output data type inheritance |
| TitleID | | mathworks.fpa.CheckRemoveOutputDataTypeInheritance |
|
| Title | | Relax input data type settings |
| TitleID | | mathworks.fpa.CheckRelaxInputDatatypeSettings |
|
| Title | | Check for non-continuous signals driving derivative ports |
| TitleID | | mathworks.design.NonContSigDerivPort |
|
| Title | | Check model, local libraries, and referenced models for known upgrade issues requiring compile time information |
| TitleID | | mathworks.design.UpdateRequireCompile |
|
| Title | | Identify blocks that generate expensive saturation and rounding code |
| TitleID | | mathworks.codegen.ExpensiveSaturationRoundingCode |
|
| Title | | Check for partial structure parameter usage with bus signals |
| TitleID | | mathworks.design.PartialBusParams |
|
| Title | | Check sample times and tasking mode |
| TitleID | | mathworks.codegen.SampleTimesTaskingMode |
|
| Title | | Check for proper bus usage |
| TitleID | | mathworks.design.MuxBlkAsBusCreator |
|
| Title | | Check for potentially delayed function-call block return values |
| TitleID | | mathworks.design.DelayedFcnCallSubsys |
|
| Title | | Identify questionable subsystem settings |
| TitleID | | mathworks.codegen.QuestionableSubsysSetting |
|
| Title | | Identify block output signals with continuous sample time and non-floating point data type |
| TitleID | | mathworks.design.OutputSignalSampleTime |
|
| Title | | Check for proper Merge block usage |
| TitleID | | mathworks.design.MergeBlkUsage |
|
| Title | | Check consistency of initialization parameters for Outport and Merge blocks |
| TitleID | | mathworks.design.InitParamOutportMergeBlk |
|
| Title | | Check data store block sample times for modeling errors |
| TitleID | | mathworks.design.DataStoreBlkSampleTime |
|
| Title | | Check for potential ordering issues involving data store access |
| TitleID | | mathworks.design.OrderingDataStoreAccess |
|
| Title | | Identify questionable fixed-point operations |
| TitleID | | mathworks.codegen.QuestionableFxptOperations |
|
| Title | | Identify time-varying source blocks interfering with frequency response estimation |
| TitleID | | mathworks.slcontrolfrest.timevaryingsources |
|
| | |
| Task Name | | Modeling Guidelines for MISRA-C:2004 |
|
| Task Name | | Simulation Performance and Accuracy |
|
| Task Name | | Simulation Runtime Accuracy Diagnostics |
|
| Task Name | | Managing Data Store Memory Blocks |
|
| Task Name | | Modeling Signals and Parameters using Buses |
|
| Task Name | | Code Generation Efficiency |
|
| Task Name | | Model Referencing |
|
| Task Name | | Upgrading to the Current Simulink Version |
|
| Task Name | | Managing Library Links |
|
| Task Name | | Frequency Response Estimation |
|